Combinational Lock Design

Combinational Lock Design

A digital lock evolution from its simple FSM block diagram to a Multisim model, wired onto a breadboard, transition into LabVIEW, and finally programmed in a microcontroller.


About.

  • Team size: individual
  • Duration:  16 weeks (whole semester)
  • Project role: Circuit designer, Programmer
  • Software: NI Multisim, NI LabVIEW, Ultiboard, Win-CUPL(FPLD)
  • Hardware: myDAQ, Voltage generator, DMM
  • Other tools used: 4/3/2 input NAND gate chip, D-flipflop chip, Programmable Timer chip (CD4541BE), CPLD, Microchip PIC microcontroller, LED LCD Character Display, Rotary pot, switch, ....etc
 

Project Outline.

The goal of this project is to take a simple combinational lock FSM and implement it through various hardware realization methods.  Each final design is compared for their pros and cons, as well as, the design time it took to achieve the desired combinational lock function.  Iterations as follow:

  1. Discrete Logic, NI Multisim and Ultiboard
    • Built using NAND gate, LED, switchs and wires on breadboard
  2. NI myDAQ
    • Built using LabVIEW (data-flow programming)
  3. Programmable logic device (Atmel ATF750)
    • Built using Atmel WinCUPL (Hardware description language)
  4. Embedded microporcessors (dsPIC33EP64MC502ISP)
    • Built using Microchip MPLAB C compiler
 

Design Details.

Design 1: Multisim Model and Breadboard Wiring

 

Design 2: LabVIEW Design (front & back panel)

 

Design 3: PLD Design with WinCUPL Language 

 

Design 3: Microcontroller in MPLAB C-code

 
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